Datasheet

MC9S12DT128B Device User Guide — V01.09
32 D NOACC hold time
t
NOH
2ns
33 D IPIPO[1:0] delay time
t
P0D
27ns
34 D
IPIPO[1:0] valid time to E rise (PW
EL
–t
P0D
)t
P0V
11 ns
35 D
IPIPO[1:0] delay time
(1)
(PW
EH
-t
P1V
)
t
P1D
225ns
36 D IPIPO[1:0] valid time to E fall
t
P1V
11 ns
NOTES:
1. Affected by clock stretch: add N x t
cyc
where N=0,1,2 or 3, depending on the number of clock stretches.
Table A-20 Expanded Bus Timing Characteristics
Conditions are shown in Table A-4 unless otherwise noted, C
LOAD
= 50pF
Num C Rating Symbol Min Typ Max Unit
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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nc
.
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