Datasheet

MC9S
2 PRODUCT PROPOSAL, Rev 6.1, 23-Oct-02
Analog-to-Digital Converters
One or two 8-channel modules with 10-bit resolution depending on the package option
External conversion trigger capability
Up to five 1M bit per second, CAN 2.0 A, B software compatible modules
Five receive and three transmit buffers
Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit
Four separate interrupt channels for Receive, Transmit, Error and Wake-up
Low-pass filter wake-up function in STOP mode
Loop-back for self test operation
Enhanced Capture Timer (ECT)
16-bit main counter with 7-bit prescaler
8 programmable input capture or output compare channels; 4 of the 8 input captures with buffer
Input capture filters and buffers, three successive captures on four channels, or two captures on four
channels with a capture/compare selectable on the remaining four
Four 8-bit or two 16-bit pulse accumulators
16-bit modulus down-counter with 4-bit prescaler
Four user-selectable delay counters for signal filtering
8 PWM channels with programmable period and duty cycle (7 channels on 80 Pin Packages)
8-bit, 8-channel or 16-bit, 4-channel
Separate control for each pulse width and duty cycle
Center- or left-aligned outputs
Programmable clock select logic with a wide range of frequencies
Serial interfaces
Two asynchronous serial communications interfaces (SCI)
Up to three synchronous serial peripheral interfaces (SPI)
IIC
SAE J1850 Compatible Module (BDLC)
10.4 kbps Variable Pulse Width format
Byte level receive and transmit
4x receive mode supported
SIM (System Integration Module)
CRG (windowed COP watchdog, real time interrupt, clock monitor, clock generation and reset)
MEBI (multiplexed external bus interface)
INT (interrupt control)
Clock generation
Phase-locked loop clock frequency multiplier
Limp home mode in absence of external clock
Clock Monitor
Low power 0.5 to 16 MHz crystal oscillator reference clock
Operating frequency for ambient temperatures T
A
-40°C <= T
A
<= 125°C
50MHz equivalent to 25MHz Bus Speed for single chip
40MHz equivalent to 20MHz Bus Speed in expanded bus modes.
Internal 5V to 2.5V Regulator
112-Pin LQFP or 80-Pin QFP package
I/O lines with 5V input and drive capability
5V A/D converter inputs and 5V I/O
2.5V logic supply
Development support
Single-wire background debug mode (BDM)
On-chip hardware breakpoints
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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