Datasheet

MC9S12DT128B Device User Guide — V01.09
PE1 IRQ — — — VDDR
Always
Up
Up
Port E Input,
Maskable Interrupt
PE0
XIRQ — — — VDDR
Always
Up
Up
Port E Input, Non
Maskable Interrupt
PH7 KWH7 --- — — VDDR
PERH/
PPSH
Disabled Port H I/O, Interrupt
PH6 KWH6 --- — — VDDR
PERH/
PPSH
Disabled Port H I/O, Interrupt
PH5 KWH5 --- — — VDDR
PERH/
PPSH
Disabled Port H I/O, Interrupt
PH4 KWH4 --- — — VDDR
PERH/
PPSH
Disabled Port H I/O, Interrupt
PH3 KWH3
SS1 — — VDDR
PERH/
PPSH
Disabled
Port H I/O, Interrupt,
SS of SPI1
PH2 KWH2 SCK1 — — VDDR
PERH/
PPSH
Disabled
Port H I/O, Interrupt,
SCK of SPI1
PH1 KWH1 MOSI1 — — VDDR
PERH/
PPSH
Disabled
Port H I/O, Interrupt,
MOSI of SPI1
PH0 KWH0 MISO1 — — VDDR
PERH/
PPSH
Disabled
Port H I/O, Interrupt,
MISO of SPI1
PJ7 KWJ7 TXCAN4 SCL — VDDX
PERJ/
PPSJ
Up
Port J I/O, Interrupt,
TX of CAN4, SCL of
IIC
PJ6 KWJ6 RXCAN4 SDA — VDDX
PERJ/
PPSJ
Up
Port J I/O, Interrupt,
RX of CAN4, SDA of
IIC
PJ[1:0] KWJ[1:0] — — — VDDX
PERJ/
PPSJ
Up Port J I/O, Interrupts
PK7
ECS ROMCTL ——VDDX
PUCR/
PUPKE
Up
Port K I/O,
Emulation Chip
Select, ROM Control
PK[5:0]
XADDR[19:
14]
———VDDX
PUCR/
PUPKE
Up
Port K I/O, Extended
Addresses
PM7 BF_PSLM TXCAN4 — — VDDX
PERM/
PPSM
Disabled
Port M I/O, BF slot
mismatch pulse, TX
of CAN4
PM6 BF_PERR RXCAN4 — — VDDX
PERM/
PPSM
Disabled
Port M I/O, BF illegal
pulse/message
format error pulse,
RX of CAN4
PM5 BF_PROK TXCAN0 TXCAN4 SCK0 VDDX
PERM/
PPSM
Disabled
Port M I/O, BF
reception ok pulse,
TX of CAN0, CAN4,
SCK of SPI0
PM4 BF_PSYN RXCAN0 RXCAN4 MOSI0 VDDX
PERM/
PPSM
Disabled
Port M I/O, BF sync
pulse (Rx/Tx) OK
pulse o/p, RX of
CAN0, CAN4, MOSI
of SPI0
Pin Name
Function 1
Pin Name
Function 2
Pin Name
Function 3
Pin Name
Function 4
Pin Name
Function 5
Powered
by
Internal Pull
Resistor
Description
CTRL
Reset
State
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc
.
..