Datasheet

Chapter 2 256 Kbyte Flash Module (S12FTS256K2V1)
MC9S12E256 Data Sheet, Rev. 1.10
106 Freescale Semiconductor
2.4.1.3.1 Erase Verify Command
The erase verify operation is used to confirm that a Flash block is erased. After launching the erase verify
command, the CCIF flag in the FSTAT register will set after the operation has completed unless a second
command has been buffered. The number of bus cycles required to execute the erase verify operation is
equal to the number of addresses in the Flash block plus 12 bus cycles as measured from the time the
CBEIF flag is cleared until the CCIF flag is set. The result of the erase verify operation is reflected in the
state of the BLANK flag in the FSTAT register. If the BLANK flag is set in the FSTAT register, the Flash
memory is erased.
Figure 2-23. Example Erase Verify Command Flow
Write: Register FCLKDIV
Read: Register FCLKDIV
Bit FDIVLD set?
Write: Flash Block Address
Write: Register FCMD
Erase Verify Command 0x05
Write: Register FSTAT
yes
no
Clear bit CBEIF 0x80
Clock Register
Loaded
Check
1.
2.
3.
Clear bit ACCERR 0x10
Write: Register FSTAT
yes
Access
Error Check
Read: Register FSTAT
no
no
and Dummy Data
Bit Polling for
Command
Completion Check
Read: Register FSTAT
NOTE: command write sequence
aborted by writing 0x00 to
FSTAT register.
NOTE: command write sequence
aborted by writing 0x00 to
FSTAT register.
CCIF
Set?
Bit
ACCERR
Set?
Bit
EXIT
yes
BLANK
Set?
Bit
yes
no
Flash Block Not Erased;
Mass Erase Flash Block