Datasheet

Chapter 3 Port Integration Module (PIM9E256V1) Block Description
MC9S12E256 Data Sheet, Rev. 1.10
Freescale Semiconductor 141
3.3.2.4 Port M Reduced Drive Register (RDRM)
Read: Anytime. Write: Anytime.
This register configures the drive strength of configured output pins as either full or reduced. If a pin is
configured as input, the corresponding Reduced Drive Register bit has no effect.
Table 3-9. DDRM Field Descriptions
Field Description
7:3, 1:0
DDRM[7:3,
1:0]
Data Direction Port M
0 Associated pin is configured as input.
1 Associated pin is configured as output.
Module Base + 0x0013
76543210
R
RDRM7 RDRM6 RDRM5 RDRM4 RDRM3
0
RDRM1 RDRM0
W
Reset 0 0 0 00000
= Reserved or Unimplemented
Figure 3-13. Port M Reduced Drive Register (RDRM)
Table 3-10. RDRM Field Descriptions
Field Description
7:3, 1:0
RDRM[7:3,
1:0]
Reduced Drive Port M
0 Full drive strength at output
1 Associated pin drives at about 1/3 of the full drive strength.