Datasheet

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6C) Module
MC9S12E256 Data Sheet, Rev. 1.10
Freescale Semiconductor 337
11.3.2.2 PMF Configure 1 Register (PMFCFG1)
6
MTG
Multiple Timebase Generators — This bit determines the number of timebase counters used. Once set, MTG
can be cleared only by reset.
If MTG is set, PWM generators B and C and registers $0028 – $0037 are available. The three generators have
their own variable frequencies and are not synchronized.
If MTG is cleared, PMF registers from $0028 – $0037 can not be written and read zeroes, and bits EDGEC and
EDGEB are ignored. Pair A, Pair B and Pair C PWMs are synchronized to PWM generator A and use registers
from $0020 – $0027.
0 Single timebase generator.
1 Multiple timebase generators.
5
EDGEC
Edge-Aligned or Center-Aligned PWM for Pair C — This bit determines whether PWM4 and PWM5 channels
will use edge-aligned or center-aligned waveforms. This bit has no effect if MTG bit is cleared. This bit cannot be
modified after the WP bit is set.
0 PWM4 and PWM5 are center-aligned PWMs
1 PWM4 and PWM5 are edge-aligned PWMs
4
EDGEB
Edge-Aligned or Center-Aligned PWM for Pair B — This bit determines whether PWM2 and PWM3 channels
will use edge-aligned or center-aligned waveforms. This bit has no effect if MTG bit is cleared. This bit cannot be
modified after the WP bit is set.
0 PWM2 and PWM3 are center-aligned PWMs
1 PWM2 and PWM3 are edge-aligned PWMs
3
EDGEA
Edge-Aligned or Center-Aligned PWM for Pair A— This bit determines whether PWM0 and PWM1 channels
will use edge-aligned or center-aligned waveforms. It determines waveforms for Pair B and Pair C if the MTG bit
is cleared. This bit cannot be modified after the WP bit is set.
0 PWM0 and PWM1 are center-aligned PWMs
1 PWM0 and PWM1 are edge-aligned PWMs
2
INDEPC
Independent or Complimentary Operation for Pair C— This bit determines if the PWM channels 4 and 5 will
be independent PWMs or complementary PWMs. This bit cannot be modified after the WP bit is set.
0 PWM4 and PWM5 are complementary PWM pair
1 PWM4 and PWM5 are independent PWMs
1
INDEPB
Independent or Complimentary Operation for Pair B— This bit determines if the PWM channels 2 and 3 will
be independent PWMs or complementary PWMs. This bit cannot be modified after the WP bit is set.
0 PWM2 and PWM3 are complementary PWM pair
1 PWM2 and PWM3 are independent PWMs
0
INDEPA
Independent or Complimentary Operation for Pair A— This bit determines if the PWM channels 0 and 1 will
be independent PWMs or complementary PWMs. This bit cannot be modified after the WP bit is set.
0 PWM0 and PWM1 are complementary PWM pair
1 PWM0 and PWM1 are independent PWMs
Address: $0001
76543210
R
ENHA
0
BOTNEGC TOPNEGC BOTNEGB TOPNEGB BOTNEGA TOPNEGA
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 11-5. PMF Configure 1 Register (PMFCFG1)
Table 11-3. PMFCFG0 Field Descriptions (continued)
Field Description