Datasheet

Chapter 13 Timer (S12TIM16B4CV1) Block Description
MC9S12E256 Data Sheet, Rev. 1.10
Freescale Semiconductor 423
13.2 Signal Description
The S12TIM16B4C module has a total four external pins.
13.2.1 Detailed Signal Descriptions
13.2.1.1 IOC7 — Input Capture and Output Compare Channel 7
This pin serves as input capture or output compare for channel 7.This pin can also be configured as pulse
accumulator input.
13.2.1.2 IOC6 — Input Capture and Output Compare Channel 6
This pin serves as input capture or output compare for channel 6.
13.2.1.3 IOC5 — Input Capture and Output Compare Channel 5
This pin serves as input capture or output compare for channel 5.
13.2.1.4 IOC4 — Input Capture and Output Compare Channel 4
This pin serves as input capture or output compare for channel 4.
NOTE
For the description of interrupts see Section 13.6, “Interrupts”.
13.3 Memory Map and Registers
13.3.1 Overview
This section provides a detailed description of all memory and registers.
13.3.2 Module Memory Map
A register summary for the S12TIM16B4C module is given below in Figure 13-2. The address listed for
each register is the address offset. The total address for each register is the sum of the base address for the
S12TIM16B4C module and the address offset for each register.