Datasheet

Chapter 13 Timer (S12TIM16B4CV1) Block Description
MC9S12E256 Data Sheet, Rev. 1.10
Freescale Semiconductor 425
13.3.3 Register Descriptions
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
0x001A TC5 (High)
R
tc5
15
tc5
14
tc5
13
tc5
12
tc5
11
tc5
10
tc5
9
tc5
8
W
0x001B TC5 (Low)
R
tc5
7
tc5
6
tc5
5
tc5
4
tc5
3
tc5
2
tc5
1
tc5
0
W
0x001C TC6 (High)
R
tc6
15
tc6
14
tc6
13
tc6
12
tc6
11
tc6
10
tc6
9
tc6
8
W
0x001D TC6(Low)
R
tc6
7
tc6
6
tc6
5
tc6
4
tc6
3
tc6
2
tc6
1
tc6
0
W
0x001E TC7 (High)
R
tc7
15
tc7
14
tc7
13
tc7
12
tc7
11
tc7
10
tc7
9
tc7
8
W
0x001F TC7 (Low)
R
tc7
7
tc7
6
tc7
5
tc7
4
tc7
3
tc7
2
tc7
1
tc7
0
W
0x0020 PACTL
R0
PAEN PAMOD PEDGE CLK1 CLK0 PAOVI PAI
W
0x0021 PAFLG
R0 00000
PAOVF PAIF
W
0x0022 PACNT (High)
R
pacnt
15
pacnt
14
pacnt
13
pacnt
12
pacnt
11
pacnt
10
pacnt
9
pacnt
8
W
0x0023 PACNT (Low)
R
pacnt
7
pacnt
6
pacnt
5
pacnt
4
pacnt
3
pacnt
2
pacnt
1
pacnt
0
W
0x0024
↓
0x002C
Reserved
R
W
0x002D TIMTST
R
Timer Test Register
W
0x002E
↓
0x002F
Reserved
R
W
Address Name Bit 7 65432 1Bit 0
= Unimplemented or Reserved
Figure 13-2. TIM16B4CV1 Register Summary (Sheet 2 of 2)