Datasheet

Chapter 13 Timer (S12TIM16B4CV1) Block Description
MC9S12E256 Data Sheet, Rev. 1.10
430 Freescale Semiconductor
13.3.3.8 Timer Control Register 1 (TCTL1)
Read or write anytime.
Table 13-9. The OC7 and OCx event priority
Note: in Table 13-9, the IOS7 and IOSx should be set to 1
Module Base + 0x0008
76543210
R
OM7 OL7 OM6 OL6 OM5 OL5 OM4 OL4
W
Reset 0 0 0 00000
Figure 13-10. Timer Control Register 1 (TCTL1)
Table 13-7. TCTL1 Field Descriptions
Field Description
7, 5, 3, 1
OM[7:4]
6, 4, 3, 0
OL[7:4]
OMn — Output Mode Bit
OLn — Output Level Bit
These four pairs of control bits are encoded to specify the output action to be taken as a result of a successful
Output Compare on "n" channel. When either OMn or OLn is one, the pin associated with the corresponding
channel becomes an output tied to its IOC. To enable output action by OMn and OLn bits on timer port, the
corresponding bit in OC7M should be cleared.
To operate the 16-bit pulse accumulator independently of input capture or output compare 7 and 4 respectively
the user must set the corresponding bits IOSn = 1, OMn = 0, OLn = 0 and OC7M7 = 0
See Table 13-8.
To enable output action using the OM7 and OL7 bits on the timer port,the corresponding bit
OC7M7 in the OC7M register must also be cleared. The settings for these bits can be seen in
Table 13-9
Table 13-8. Compare Result Output Action
OMn OLn Action
0 0 Timer disconnected from output pin logic
0 1 Toggle OCn output line
1 0 Clear OCn output line to zero
1 1 Set OCn output line to one
OC7M7=0 OC7M7=1
OC7Mx=1 OC7Mx=0 OC7Mx=1 OC7Mx=0
TC7=TCx TC7>TCx TC7=TCx TC7>TCx TC7=TCx TC7>TCx TC7=TCx TC7>TCx
IOCx=OC7Dx
IOC7=OM7/O
L7
IOCx=OC7Dx
+OMx/OLx
IOC7=OM7/O
L7
IOCx=OMx/OLx
IOC7=OM7/OL7
IOCx=OC7Dx
IOC7=OC7D7
IOCx=OC7Dx
+OMx/OLx
IOC7=OC7D7
IOCx=OMx/OLx
IOC7=OC7D7