Datasheet

Chapter 18 Multiplexed External Bus Interface (MEBIV3)
MC9S12E256 Data Sheet, Rev. 1.10
Freescale Semiconductor 531
18.3.2.5 Reserved Registers
Module Base + 0x0004
Starting address location affected by INITRG register setting.
76543210
R00000000
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 18-6. Reserved Register
Module Base + 0x0005
Starting address location affected by INITRG register setting.
76543210
R00000000
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 18-7. Reserved Register
Module Base + 0x0006
Starting address location affected by INITRG register setting.
76543210
R00000000
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 18-8. Reserved Register
Module Base + 0x0007
Starting address location affected by INITRG register setting.
76543210
R00000000
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 18-9. Reserved Register