Datasheet

Chapter 1 MC9S12E256 Device Overview (MC9S12E256DGV1)
MC9S12E256 Data Sheet, Rev. 1.10
66 Freescale Semiconductor
1.4.25 PM1 / DAO1 — Port M I/O Pin 1
PM1 is a general purpose input or output pin. When the Digital to Analog module 1 (DAC1) is enabled
the PM1 pin is configured as the analog output DA01 of DAC1. While in reset and immediately out of
reset the PM1 pin is configured as a high impedance input pin. Consult Chapter 3, “Port Integration
Module (PIM9E256V1) Block Description” and Chapter 7, “Digital-to-Analog Converter (DAC8B1CV1)
Block Description” for information about pin configurations.
1.4.26 PM0 / DAO2 — Port M I/O Pin 0
PM0 is a general purpose input or output pin. When the Digital to Analog module 2 (DAC2) is enabled
the PM0 pin is configured as the analog output DA02 of DAC2. While in reset and immediately out of
reset the PM0 pin is configured as a high impedance input pin. Consult Chapter 3, “Port Integration
Module (PIM9E256V1) Block Description” and Chapter 7, “Digital-to-Analog Converter (DAC8B1CV1)
Block Description” for information about pin configurations.
1.4.27 PP[5:0] / PW0[5:0] — Port P I/O Pins [5:0]
PP[5:0] are general purpose input or output pins. When the Pulse width Modulator with Fault protection
(PMF) is enabled the PP[5:0] output pins, as a whole or as pairs, can be configured as PW0[5:0] outputs.
While in reset and immediately out of reset the PP[5:0] pins are configured as a high impedance input pins.
Consult Chapter 3, “Port Integration Module (PIM9E256V1) Block Description” and Chapter 11, “Pulse
Width Modulator with Fault Protection (PMF15B6C) Module” for information about pin configurations.
1.4.28 PQ[6:4] / IS[2:0] — Port Q I/O Pins [6:4]
PQ[6:4] are general purpose input or output pins. When enabled in the Pulse width Modulator with Fault
protection module (PMF), the PQ[6:4] pins become the current status input pins,
IS[2:0], for top/bottom
pulse width correction. While in reset and immediately out of reset PP[5:0] pins are configured as a high
impedance input pins. Consult Chapter 3, “Port Integration Module (PIM9E256V1) Block Description”
and Chapter 11, “Pulse Width Modulator with Fault Protection (PMF15B6C) Module” for information
about pin configurations.
1.4.29 PQ[3:0] / FAULT[3:0] — Port Q I/O Pins [3:0]
PQ[3:0] are general purpose input or output pins. When enabled in the Pulse width Modulator with Fault
protection module (PMF), the PQ[3:0] pins become the Fault protection inputs pins, FAULT[3:0], of the
PMF. While in reset and immediately out of reset the PQ[3:0] pins are configured as a high impedance
input pins. Consult Chapter 3, “Port Integration Module (PIM9E256V1) Block Description” and the
Chapter 11, “Pulse Width Modulator with Fault Protection (PMF15B6C) Module” for information about
pin configurations.
1.4.30 PS7 / SS — Port S I/O Pin 7
PS7 is a general purpose input or output. When the Serial Peripheral Interface (SPI) is enabled PS7
becomes the slave select pin
SS. While in reset and immediately out of reset the PS7 pin is configured as