Datasheet

Chapter 1 MC9S12E256 Device Overview (MC9S12E256DGV1)
MC9S12E256 Data Sheet, Rev. 1.10
Freescale Semiconductor 69
Modulator (PWM8B6CV1) Block Description” for information about pin configurations. PU[5:4] are not
available in the 80 pin package version.
1.4.42 PU[3:0] / IOC2[7:4]/PW1[3:0] — Port U I/O Pins [3:0]
PU[3:0] are general purpose input or output pins. When the Timer system 2 (TIM2) is enabled they can
also be configured as the TIM2 input capture or output compare pins IOC2[7-4]. When the Pulse Width
Modulator (PWM) is enabled the PU[3:0] output pins, individually or as a pair, can be configured as
PW1[3:0] outputs. The MODRR register in the Port Integration Module determines if the TIM2 or PWM
function is selected. While in reset and immediately out of reset the PU[3:0] pins are configured as a high
impedance input pins. Consult Chapter 3, “Port Integration Module (PIM9E256V1) Block Description”,
Chapter 13, “Timer (S12TIM16B4CV1) Block Description”, and Chapter 12, “Pulse-Width Modulator
(PWM8B6CV1) Block Description” for information about pin configurations.
1.4.43 VDDX,VSSX — Power & Ground Pins for I/O Drivers
External power and ground for I/O drivers. Bypass requirements depend on how heavily the MCU pins are
loaded.
1.4.44 VDDR, VSSR — Power Supply Pins for I/O Drivers & for Internal
Voltage Regulator
External power and ground for I/O drivers and input to the internal voltage regulator. Bypass requirements
depend on how heavily the MCU pins are loaded.
1.4.45 VDD1, VDD2, VSS1, VSS2 — Power Supply Pins for Internal Logic
Power is supplied to the MCU through VDD and VSS. This 2.5V supply is derived from the internal
voltage regulator. There is no static load on those pins allowed. The internal voltage regulator is turned off,
if VDDR is tied to ground.
1.4.46 VDDA, VSSA — Power Supply Pins for ATD and VREG
VDDA, VSSA are the power supply and ground input pins for the voltage regulator and the analog to
digital converter.
1.4.47 VRH, VRL — ATD Reference Voltage Input Pins
VRH and VRL are the reference voltage input pins for the analog to digital converter.
1.4.48 VDDPLL, VSSPLL — Power Supply Pins for PLL
Provides operating voltage and ground for the Oscillator and the Phased-Locked Loop. This allows the
supply voltage to the Oscillator and PLL to be bypassed independently. This 2.5V voltage is generated by
the internal voltage regulator.