Datasheet

Chapter 1 MC9S12E256 Device Overview (MC9S12E256DGV1)
MC9S12E256 Data Sheet, Rev. 1.10
Freescale Semiconductor 77
1.9.2.2 Effects of Reset
When a reset occurs, MCU registers and control bits are changed to known start-up states. Refer to the
respective module block description chapters for register reset states. Refer to Chapter 18, “Multiplexed
External Bus Interface (MEBIV3)” for mode dependent pin configuration of port A, B and E out of reset.
Refer to Chapter 3, “Port Integration Module (PIM9E256V1) Block Description” for reset configurations
of all peripheral module ports.
Refer to Table 1-1 for locations of the memories depending on the operating mode after reset.
The RAM array is not automatically initialized out of reset.
1.10 Recommended Printed Circuit Board Layout
The Printed Circuit Board (PCB) must be carefully laid out to ensure proper operation of the voltage
regulator as well as the MCU itself. The following rules must be observed:
• Every supply pair must be decoupled by a ceramic capacitor connected as near as possible to the
corresponding pins (C1–C6).
• Central point of the ground star should be the VSSR pin.
• Use low ohmic low inductance connections between VSS1, VSS2 and VSSR.
• VSSPLL must be directly connected to VSSR.
• Keep traces of VSSPLL, EXTAL and XTAL as short as possible and occupied board area for C7,
C8, C11 and Q1 as small as possible.
• Do not place other signals or supplies underneath area occupied by C7, C8, C10 and Q1 and the
connection area to the MCU.
• Central power input should be fed in at the VDDA/VSSA pins.
Table 1-11. Recommended Decoupling Capacitor Choice
Component Purpose Type Value
C1 VDD1 filter cap Ceramic X7R 100–220nF
C2 VDD2 filter cap (80 QFP only) Ceramic X7R 100–220nF
C3 VDDA filter cap Ceramic X7R 100nF
C4 VDDR filter cap X7R/tantalum >=100nF
C5 VDDPLL filter cap Ceramic X7R 100nF
C6 VDDX filter cap X7R/tantalum >=100nF
C7 OSC load cap
See PLL specification chapter
C8 OSC load cap
C9 PLL loop filter cap
C10 PLL loop filter cap
C11 DC cutoff cap
R1 PLL loop filter res
Q1 Quartz