Datasheet

Chapter 2 128 Kbyte Flash Module (FTS128K1V1)
MC9S12E128 Data Sheet, Rev. 1.07
100 Freescale Semiconductor
In normal modes, all FABHI and FABLO bits read 0 and are not writable. In special modes, the FABHI
and FABLO bits are readable and writable. For sector erase, the MCU address bits [9:0] are ignored. For
mass erase, any address within the Flash array is valid to start the command.
2.3.2.10 Flash Data Register (FDATA)
FDATAHI and FDATALO are the Flash data registers.
In normal modes, all FDATAHI and FDATALO bits read 0 and are not writable. In special modes, all
FDATAHI and FDATALO bits are readable and writable when writing to an address within the Flash
address range.
2.3.2.11 RESERVED3
This register is reserved for factory testing and is not accessible to the user.
Module Base + 0x0009
76543210
R
FABLO
W
Reset 00000000
Figure 2-14. Flash Address Low Register (FADDRLO)
Module Base + 0x000A
76543210
R
FDHI
W
Reset 00000000
Figure 2-15. Flash Data High Register (FDATAHI)
Module Base + 0x000B
76543210
R
FDLO
W
Reset 00000000
Figure 2-16. Flash Data Low Register (FDATALO)