Datasheet

Chapter 3 Port Integration Module (PIM9E128V1)
MC9S12E128 Data Sheet, Rev. 1.07
132 Freescale Semiconductor
3.3.1.4 Port AD Reduced Drive Register (RDRAD)
Read: Anytime. Write: Anytime.
This register configures the drive strength of configured output pins as either full or reduced. If a pin is
configured as input, the corresponding Reduced Drive Register bit has no effect.
76543210
R
RDRAD15 RDRAD14 RDRAD13 RDRAD12 RDRAD11 RDRAD10 RDRAD9 RDRAD8
W
Reset 0 0 0 00000
76543210
R
RDRAD7 RDRAD6 RDRAD5 RDRAD4 RDRAD3 RDRAD2 RDRAD1 RDRAD0
W
Reset 0 0 0 00000
Figure 3-5. Port AD Reduced Drive Register (RDRAD)
Table 3-4. RDRAD Field Descriptions
Field Description
15:0
RDRAD[15:0]
Reduced Drive Port AD
0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.