Datasheet

Chapter 3 Port Integration Module (PIM9E128V1)
MC9S12E128 Data Sheet, Rev. 1.07
162 Freescale Semiconductor
3.5 Resets
The reset values of all registers are given in the register description in Section 3.3, “Memory Map and
Register Definition”.
All ports start up as general-purpose inputs on reset.
3.5.1 Reset Initialization
All registers including the data registers get set/reset asynchronously. Table 3-37 summarizes the port
properties after reset initialization.
P
Table 3-37. Port Reset State Summary
Port
Reset States
Data
Direction
Pull Mode Red. Drive
Wired-OR
Mode
Interrupt
A Refer to
section Bus
Control and
Input/Output
Pull Up Refer to section Bus Control and Input/Output
B
E
K
BKGD pin
AD Input Hi-z Disabled N/A Disabled
M[7:4] Input Pull Up Disabled Disabled N/A
M[3,1:0] Input Hi-z Disabled Disabled N/A
P Input Hi-z Disabled N/A N/A
Q Input Hi-z Disabled N/A N/A
S Input Pull Up Disabled Disabled N/A
T Input Hi-z Disabled N/A N/A
U Input Hi-z Disabled N/A N/A