Datasheet

Chapter 4 Clocks and Reset Generator (CRGV4)
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor 193
Figure 4-24. Stop Mode Entry/Exit Sequence
4.4.10.1 Wake-Up from Pseudo-Stop (PSTP=1)
Wake-up from pseudo-stop is the same as wake-up from wait mode. There are also three different scenarios
for the CRG to restart the MCU from pseudo-stop mode:
External reset
Clock monitor fail
Wake-up interrupt
Exit Stop w.
CMRESET
Exit
Stop Mode
Enter
SCM
Exit
Stop Mode
Core req’s
Stop Mode.
Clear
PLLSEL,
Disable PLL
CME=1
?
INT
?
CM fail
?
SCME=1
?
SCMIE=1
?
Continue w.
normal OP
no
no
no
no
yes
yes
yes
yes
yes
Generate
SCM Interrupt
(Wakeup from Stop)
Enter
Stop Mode
Exit Stop w.
ext.RESET
Wait Mode left
due to external
Clock
OK
?
SCME=1
?
Enter
SCM
yes
no
yes
Exit Stop w.
CMRESET
no
no
no
PSTP=1
?
INT
?
yesno
yes
Exit
Stop Mode
Exit
Stop Mode
SCM=1
?
Enter
SCM
no
yes