Datasheet

Chapter 6 Analog-to-Digital Converter (ATD10B16CV2)
MC9S12E128 Data Sheet, Rev. 1.07
210 Freescale Semiconductor
6.3.2.1 Reserved Register (ATDCTL0)
Read: always read $00 in normal modes
Write: unimplemented in normal modes
6.3.2.2 Reserved Register (ATDCTL1)
0x000D
ATDDIEN1
R
IEN7 IEN6 IEN5 IEN4 IEN3 IEN2 IEN1 IEN0
W
0x000E
PORTAD0
R PTAD15 PTAD14 PTAD13 PTAD12 PTAD11 PTAD10 PTAD9 PTAD8
W
0x000F
PORTAD1
R PTAD7 PTAD6 PTAD5 PTAD4 PTAD3 PTAD2 PTAD1 PTAD0
W
R BIT 9 MSB
BIT 7 MSB
BIT 8
BIT 6
BIT 7
BIT 5
BIT 6
BIT 4
BIT 5
BIT 3
BIT 4
BIT 2
BIT 3
BIT 1
BIT 2
BIT 0
0x0010–0x002F
ATDDRxH–
ATDDRxL
W
R BIT 1
u
BIT 0
u
0
0
0
0
0
0
0
0
0
0
0
0
W
76543210
R00000000
W
Reset 0 0 0 01111
= Unimplemented or Reserved
Figure 6-3. Reserved Register (ATDCTL0)
76543210
R00000000
W
Reset 0 0 0 01111
= Unimplemented or Reserved
Figure 6-4. Reserved Register (ATDCTL1)
Register
Name
Bit 7 6 5 4 3 2 1 Bit 0
= Unimplemented or Reserved u = Unaffected
Figure 6-2. ATD Register Summary (continued)