Datasheet

Chapter 6 Analog-to-Digital Converter (ATD10B16CV2)
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor 221
6.3.2.7 ATD Status Register 0 (ATDSTAT0)
This read-only register contains the Sequence Complete Flag, overrun flags for external trigger and FIFO
mode, and the conversion counter.
Read: Anytime
Write: Anytime (No effect on CC[3:0])
76543210
R
SCF
0
ETORF FIFOR
CC3 CC2 CC1 CC0
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 6-9. ATD Status Register 0 (ATDSTAT0)
Table 6-14. ATDSTAT0 Field Descriptions
Field Description
7
SCF
Sequence Complete Flag — This flag is set upon completion of a conversion sequence. If conversion
sequences are continuously performed (SCAN = 1), the flag is set after each one is completed. This flag is
cleared when one of the following occurs:
• Write “1” to SCF
• Write to ATDCTL5 (a new conversion sequence is started)
• If AFFC = 1 and read of a result register
0 Conversion sequence not completed
1 Conversion sequence has completed
5
ETORF
External Trigger Overrun Flag —While in edge trigger mode (ETRIGLE = 0), if additional active edges are
detected while a conversion sequence is in process the overrun flag is set. This flag is cleared when one of the
following occurs:
• Write “1” to ETORF
• Write to ATDCTL0,1,2,3,4 (a conversion sequence is aborted)
• Write to ATDCTL5 (a new conversion sequence is started)
0 No External trigger over run error has occurred
1 External trigger over run error has occurred