Datasheet

Chapter 6 Analog-to-Digital Converter (ATD10B16CV2)
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor 227
6.3.2.14 Port Data Register 0 (PORTAD0)
The data port associated with the ATD is input-only. The port pins are shared with the analog A/D inputs
AN[15:8].
Read: Anytime
Write: Anytime, no effect
The A/D input channels may be used for general-purpose digital input.
76543210
R PTAD15 PTAD14 PTAD13 PTAD12 PTAD11 PTAD10 PTAD9 PTAD8
W
Reset 1 1 1 11111
Pin
Function
AN15 AN14 AN13 AN12 AN11 AN10 AN9 AN8
= Unimplemented or Reserved
Figure 6-16. Port Data Register 0 (PORTAD0)
Table 6-21. PORTAD0 Field Descriptions
Field Description
7:0
PTAD[15:8]
A/D Channel x (ANx) Digital Input Bits— If the digital input buffer on the ANx pin is enabled (IENx = 1) or
channel x is enabled as external trigger (ETRIGE = 1, ETRIGCH[3-0] = x, ETRIGSEL = 0) read returns the
logic level on ANx pin (signal potentials not meeting V
IL
or V
IH
specifications will have an indeterminate value)).
If the digital input buffers are disabled (IENx = 0) and channel x is not enabled as external trigger, read returns
a “1”.
Reset sets all PORTAD0 bits to “1”.