Datasheet

Chapter 6 Analog-to-Digital Converter (ATD10B16CV2)
MC9S12E128 Data Sheet, Rev. 1.07
228 Freescale Semiconductor
6.3.2.15 Port Data Register 1 (PORTAD1)
The data port associated with the ATD is input-only. The port pins are shared with the analog A/D inputs
AN7-0.
Read: Anytime
Write: Anytime, no effect
The A/D input channels may be used for general-purpose digital input.
76543210
R PTAD7 PTAD6 PTAD5 PTAD4 PTAD3 PTAD2 PTAD1 PTAD0
W
Reset 1 1 1 11111
Pin
Function
AN 7 AN6 AN5 AN4 AN3 AN2 AN1 AN0
= Unimplemented or Reserved
Figure 6-17. Port Data Register 1 (PORTAD1)
Table 6-22. PORTAD1 Field Descriptions
Field Description
7:0
PTAD[7:8]
A/D Channel x (ANx) Digital Input Bits — If the digital input buffer on the ANx pin is enabled (IENx=1) or
channel x is enabled as external trigger (ETRIGE = 1, ETRIGCH[3-0] = x, ETRIGSEL = 0) read returns the
logic level on ANx pin (signal potentials not meeting V
IL
or V
IH
specifications will have an indeterminate value)).
If the digital input buffers are disabled (IENx = 0) and channel x is not enabled as external trigger, read returns
a “1”.
Reset sets all PORTAD1 bits to “1”.