Datasheet

Chapter 7 Digital-to-Analog Converter (DAC8B1CV1)
MC9S12E128 Data Sheet, Rev. 1.07
242 Freescale Semiconductor
7.3.2.4 DAC Data Register — Right Justified (DACD)
Read: read zeroes when DJM is clear
Write: unimplemented when DJM is clear
The DAC data register is an 8-bit readable/writable register that stores the data to be converted when DJM
bit is set. When the DACE bit is set, the value in this register is converted into an analog voltage such that
values from $00 to $FF result in equal voltage increments from V
SSA
to V
REF
. When DJM bit is clear, this
register reads zeroes and cannot be written.
Module Base + 0x0003
76543210
R
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
W
Reset 0 0 0 00000
Figure 7-6. DAC Data Register — Right Justified (DACD)