Datasheet

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
MC9S12E128 Data Sheet, Rev. 1.07
338 Freescale Semiconductor
Figure 11-15. Fault Decoder
11.3.2.10 PMF Output Control Register (PMFOUTC)
Read and write anytime.
Table 11-12. Fault Mapping
PWM Pin Controlling Register Bits
PWM0 DMP03
– DMP00
PWM1 DMP13
– DMP10
PWM2 DMP23
– DMP20
PWM3 DMP33
– DMP30
PWM4 DMP43
– DMP40
PWM5 DMP53
– DMP50
Module Base + 0x000C
76543210
R0 0
OUTCTL5 OUTCTL4 OUTCTL3 OUTCTL2 OUTCTL1 OUTCTL0
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 11-16. PMF Output Control Register (PMFOUTC)
Table 11-13. PMFOUTC Field Descriptions
Field Description
5–0
OUTCTL[5:0]
PMF Output Control Bits — These bits enable software control of their corresponding PWM pin. When
OUTCTLx is set, the OUTx bit activates and deactivates the PWMx output.
When operating the PWM in complementary mode, these bits must be switched in pairs for proper operation.
That is OUTCTL0 and OUTCTL1 must have the same value; OUTCTL2 and OUTCTL3 must have the same
value; and OUTCTL4 and OUTCTL5 must have the same value.
0 Software control disabled
1 Software control enabled
where X is 0, 1, 2, 3, 4 and 5
DMPx0
DMPx1
DMPx2
DMPx3
DISABLE PWM PIN x
Fault0
Fault1
Fault2
Fault3
where X is 0, 1, 2, 3, 4, 5