Datasheet

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
MC9S12E128 Data Sheet, Rev. 1.07
374 Freescale Semiconductor
11.4.7.3 Reload Flag
With a reload opportunity, regardless an actual reload occurs as determined by LDOK bit, the PWMF
reload flag is set. If the PWM reload interrupt enable bit, PWMRIE is set, the PWMF flag generates CPU
interrupt requests allowing software to calculate new PWM parameters in real time. When PWMRIE is
not set, reloads still occur at the selected reload rate without generating CPU interrupt requests.
Figure 11-67. PWMRF Reload Interrupt Request
Figure 11-68. Full-Cycle Center-Aligned PWM Value Loading
Figure 11-69. Full-Cycle Center-Aligned Modulus Loading
Vdd
CPU Interrupt
PWM Reload
Request
DQ
CLK
CLR
READ PWMRF AS 1 THEN
WRITE 0 TO PWMF
RESET
PWMRF
PWMRIE
PWM
HALF = 0, LDFQ[3:0] = 00 = Reload every cycle
LDOK = 1
MODULUS = 3
PWM VALUE = 1
PWMRF = 1
0
3
2
1
1
3
2
1
0
3
1
1
UP/DOWN
COUNTER
Up/Down
PWM
HALF = 0, LDFQ[3:0] = 00 = Reload every cycle
LDOK = 1
MODULUS = 2
PWM VALUE = 1
PWMRF = 1
1
3
1
1
1
2
1
1
1
1
1
1
0
2
1
1
COUNTER