Datasheet

Chapter 1 MC9S12E128 Device Overview (MC9S12E128DGV1)
MC9S12E128 Data Sheet, Rev. 1.07
38 Freescale Semiconductor
0x009E ATDDR7H
R Bit15 14 13 12 11 10 9 Bit8
W
0x009F ATDDR7L
R Bit7 Bit6 0 0 0 0 0 0
W
0x00A0 ATDDR8H
R Bit15 14 13 12 11 10 9 Bit8
W
0x00A1 ATDDR8L
R Bit7 Bit6 0 0 0 0 0 0
W
0x00A2 ATDDR9H
R Bit15 14 13 12 11 10 9 Bit8
W
0x00A3 ATDDR9L
R Bit7 Bit6 0 0 0 0 0 0
W
0x00A4 ATDDR10H
R Bit15 14 13 12 11 10 9 Bit8
W
0x00A5 ATDDR10L
R Bit7 Bit6 0 0 0 0 0 0
W
0x00A6 ATDDR11H
R Bit15 14 13 12 11 10 9 Bit8
W
0x00A7 ATDDR11L
R Bit7 Bit6 0 0 0 0 0 0
W
0x00A8 ATDDR12H
R Bit15 14 13 12 11 10 9 Bit8
W
0x00A9 ATDDR12L
R Bit7 Bit6 0 0 0 0 0 0
W
0x00AA ATDDR13H
R Bit15 14 13 12 11 10 9 Bit8
W
0x00AB ATDDR13L
R Bit7 Bit6 0 0 0 0 0 0
W
0x00AC ATDDR14H
R Bit15 14 13 12 11 10 9 Bit8
W
0x00AD ATDDR14L
R Bit7 Bit6 0 0 0 0 0 0
W
0x00AE ATDDR15H
R Bit15 14 13 12 11 10 9 Bit8
W
0x00AF ATDDR15L
R Bit7 Bit6 0 0 0 0 0 0
W
1
WRAP0–3 bits are available in version V04 of ATD10B16C
2
ETRIGSEL and ETRIGCH0–3 bits are available in version V04 of ATD10B16C
0x0080 – 0x00AF ATD (Analog to Digital Converter 10 Bit 16 Channel) (Sheet 3 of 3)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0