Datasheet

Chapter 13 Timer Module (TIM16B4CV1)
MC9S12E128 Data Sheet, Rev. 1.07
426 Freescale Semiconductor
To operate the 16-bit pulse accumulator independently of input capture or output compare 7 and 4
respectively the user must set the corresponding bits IOSx = 1, OMx = 0 and OLx = 0. OC7M7 in the
OC7M register must also be cleared.
Table 13-8. TCTL1/TCTL2 Field Descriptions
Field Description
7:4
OMx
Output Mode — These four pairs of control bits are encoded to specify the output action to be taken as a result
of a successful OCx compare. When either OMx or OLx is 1, the pin associated with OCx becomes an output
tied to OCx.
Note: To enable output action by OMx bits on timer port, the corresponding bit in OC7M should be cleared.
7:4
OLx
Output Level — These four pairs of control bits are encoded to specify the output action to be taken as a result
of a successful OCx compare. When either OMx or OLx is 1, the pin associated with OCx becomes an output
tied to OCx.
Note: To enable output action by OLx bits on timer port, the corresponding bit in OC7M should be cleared.
Table 13-9. Compare Result Output Action
OMx OLx Action
0 0 Timer disconnected from output pin logic
0 1 Toggle OCx output line
1 0 Clear OCx output line to zero
1 1 Set OCx output line to one