Datasheet

Chapter 13 Timer Module (TIM16B4CV1)
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor 435
13.4 Functional Description
This section provides a complete functional description of the timer TIM16B4CV1 block. Please refer to
the detailed timer block diagram in Figure 13-26 as necessary.
Figure 13-26. Detailed Timer Block Diagram
PRESCALER
CHANNEL 4
IOC4 PIN
16-BIT COUNTER
LOGIC
PR[2:1:0]
DIVIDE-BY-64
TC4
EDGE
DETECT
PACNT(hi):PACNT(lo)
PAOVF
PEDGE
PAOVI
PAMOD
PAE
16-BIT COMPARATOR
TCNT(hi):TCNT(lo)
16-BIT COUNTER
INTERRUPT
LOGIC
TOF
TOI
C4F
EDGE
DETECT
CxF
CHANNEL7
TC7
16-BIT COMPARATOR C7F
IOC7 PIN
LOGIC
EDGE
DETECT
OM:OL4
TOV4
OM:OL7
TOV7
EDG7A
EDG7B
EDG4B
TCRE
PAIF
CLEAR COUNTER
PAIF
PAI
INTERRUPT
LOGIC
CxI
INTERRUPT
REQUEST
PAOVF
CH. 7 COMPARE
CH.7 CAPTURE
MUX
CLK[1:0]
PACLK
PACLK/256
PACLK/65536
IOC4 PIN
IOC7 PIN
PACLK
PACLK/256
PACLK/65536
TE
CH. 4 COMPARE
CH. 4 CAPTURE
PA INPUT
EDG4A
channel 7 output
compare
IOC4
IOC7
Bus Clock
Bus Clock
PAOVF
PAOVI
TOF
C4F
C7F