Datasheet

Chapter 14 Dual Output Voltage Regulator (VREG3V3V2)
MC9S12E128 Data Sheet, Rev. 1.07
440 Freescale Semiconductor
14.1.3 Block Diagram
Figure 14-1 shows the function principle of VREG3V3V2 by means of a block diagram. The regulator
core REG consists of two parallel sub-blocks, REG1 and REG2, providing two independent output
voltages.
Figure 14-1. VREG3V3 Block Diagram
LVR
LVD
POR
V
DDR
V
DD
LVI
POR
LVR
CTRL
V
SS
V
DDPLL
V
SSPLL
V
REGEN
REG
REG2
REG1
PIN
V
DDA
V
SSA
REG: Regulator Core
LVD: Low Voltage Detect
CTRL: Regulator Control
LVR: Low Voltage Reset
POR: Power-on Reset