Datasheet

Chapter 15 Background Debug Module (BDMV4)
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor 451
15.3.2 Register Descriptions
Register
Name
Bit 7 6 5 4321Bit 0
Reserved R X X X X X X 0 0
W
BDMSTS R
ENBDM
BDMACT
ENTAG
SDV TRACE
CLKSW
UNSEC 0
W
Reserved R X X X XXXXX
W
Reserved R X X X XXXXX
W
Reserved R X X X XXXXX
W
Reserved R X X X XXXXX
W
BDMCCR R
CCR7 CCR6 CCR5 CCR4 CCR3 CCR2 CCR1 CCR0
W
BDMINR R 0 REG14 REG13 REG12 REG11 0 0 0
W
Reserved R 0 0 0 00000
W
Reserved R 0 0 0 00000
W
Reserved R X X X XXXXX
W
Reserved R X X X XXXXX
W
= Unimplemented, Reserved = Implemented (do not alter)
X = Indeterminate 0 = Always read zero
Figure 15-2. BDM Register Summary