Datasheet

Chapter 19 Module Mapping Control (MMCV4)
MC9S12E128 Data Sheet, Rev. 1.07
546 Freescale Semiconductor
19.3.2 Register Descriptions
19.3.2.1 Initialization of Internal RAM Position Register (INITRM)
Read: Anytime
Name Bit 7 6 5 4321Bit 0
INITRM R
RAM15 RAM14 RAM13 RAM12 RAM11
00
RAMHAL
W
INITRG R 0
REG14 REG13 REG12 REG11
000
W
INITEE R
EE15 EE14 EE13 EE12 EE11
00
EEON
W
MISC R 0 0 0 0
EXSTR1 EXSTR0 ROMHM ROMON
W
MTSTO R Bit 7 6 5 4321Bit 0
W
MTST1 R Bit 7 6 5 4321Bit 0
W
MEMSIZ0 R REG_SW0 0 EEP_SW1 EEP_SW0 0 RAM_SW2 RAM_SW1 RAM_SW0
W
MEMSIZ1 R ROM_SW1 ROM_SW0 0 0 0 0 PAG_SW1 PAG_SW0
W
PPAGE R 0 0
PIX5 PIX4 PIX3 PIX2 PIX1 PIX0
W
Reserved R 0 0 0 00000
W
= Unimplemented
Figure 19-2. MMC Register Summary
76543210
R
RAM15 RAM14 RAM13 RAM12 RAM11
00
RAMHAL
W
Reset 0 0 0 01001
= Unimplemented or Reserved
Figure 19-3. Initialization of Internal RAM Position Register (INITRM)