Datasheet

Chapter 19 Module Mapping Control (MMCV4)
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor 547
Write: Once in normal and emulation modes, anytime in special modes
NOTE
Writes to this register take one cycle to go into effect.
This register initializes the position of the internal RAM within the on-chip system memory map.
Table 19-2. INITRM Field Descriptions
Field Description
7:3
RAM[15:11]
Internal RAM Map Position — These bits determine the upper five bits of the base address for the system’s
internal RAM array.
0
RAMHAL
RAM High-Align — RAMHAL specifies the alignment of the internal RAM array.
0 Aligns the RAM to the lowest address (0x0000) of the mappable space
1 Aligns the RAM to the higher address (0xFFFF) of the mappable space