Datasheet

Appendix A Electrical Characteristics
MC9S12E128 Data Sheet, Rev. 1.07
588 Freescale Semiconductor
In Table A-18 the timing characteristics for slave mode are listed.
Table A-18. SPI Slave Mode Timing Characteristics
Num C Characteristic Symbol Min Typ Max Unit
1 P SCK Frequency f
sck
DC — 1/4f
bus
1 P SCK Period t
sck
4— t
bus
2 D Enable Lead Time t
lead
4——t
bus
3 D Enable Lag Time t
lag
4——t
bus
4 D Clock (SCK) High or Low Time t
wsck
4——t
bus
5 D Data Setup Time (Inputs) t
su
8——ns
6 D Data Hold Time (Inputs) t
hi
8——ns
7 D Slave Access Time (time to data active) t
a
— — 20 ns
8 D Slave MISO Disable Time t
dis
— — 22 ns
9 D Data Valid after SCK Edge t
vsck
— — 30 + t
bus
1
1
t
bus
added due to internal synchronization delay
ns
10 D Data Valid after
SS fall t
vss
— — 30 + t
bus
1
ns
11 D Data Hold Time (Outputs) t
ho
20 — — ns
12 D Rise and Fall Time Inputs t
rfi
—— 8 ns
13 D Rise and Fall Time Outputs t
rfo
—— 8 ns
∞