Datasheet

Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
MC9S12XDP512 Data Sheet, Rev. 2.21
316 Freescale Semiconductor
TC6 (High) R
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
W
TC6 (Low) R
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
W
TC7 (High) R
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
W
TC7 (Low) R
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
W
PACTL R 0
PAEN PAMOD PEDGE CLK1 CLK0 PA0VI PAI
W
PAFLG R 000000
PA0VF PAIF
W
PACN3 R
PACNT7(15) PACNT6(14) PACNT5(13) PACNT4(12) PACNT3(11) PACNT2(10) PACNT1(9) PACNT0(8)
W
PACN2 R
PACNT7 PACNT6 PACNT5 PACNT4 PACNT3 PACNT2 PACNT1 PACNT0
W
PACN1 R
PACNT7(15) PACNT6(14) PACNT5(13) PACNT4(12) PACNT3(11) PACNT2(10) PACNT1(9) PACNT0(8)
W
PACN0 R
PACNT7 PACNT6 PACNT5 PACNT4 PACNT3 PACNT2 PACNT1 PACNT0
W
MCCTL R
MCZI MODMC RDMCL
00
MCEN MCPR1 MCPR0
W ICLAT FLMC
MCFLG R
MCZF
0 0 0 POLF3 POLF2 POLF1 POLF0
W
ICPARR0000
PA3EN PA2EN PA1EN PA0EN
W
DLYCT R
DLY7 DLY6 DLY5 DLY4 DLY3 DLY2 DLY1 DLY0
W
ICOVW R
NOVW7 NOVW6 NOVW5 NOVW4 NOVW3 NOVW2 NOVW1 NOVW0
W
Register
Name
Bit 7 654321Bit 0
= Unimplemented or Reserved
Figure 7-2. ECT Register Summary (Sheet 3 of 5)