Datasheet

Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor 349
7.3.2.31 Timer Input Capture Holding Registers 0–3 (TCxH)
15 14 13 12 11 10 9 8
R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8
W
Reset 00000000
= Unimplemented or Reserved
Figure 7-57. Timer Input Capture Holding Register 0 High (TC0H)
76543210
R TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0
W
Reset 00000000
= Unimplemented or Reserved
Figure 7-58. Timer Input Capture Holding Register 0 Low (TC0H)
15 14 13 12 11 10 9 8
R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8
W
Reset 00000000
= Unimplemented or Reserved
Figure 7-59. Timer Input Capture Holding Register 1 High (TC1H)
76543210
R TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0
W
Reset 00000000
= Unimplemented or Reserved
Figure 7-60. Timer Input Capture Holding Register 1 Low (TC1H)
15 14 13 12 11 10 9 8
R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8
W
Reset 00000000
= Unimplemented or Reserved
Figure 7-61. Timer Input Capture Holding Register 2 High (TC2H)
76543210
R TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0
W
Reset 00000000
= Unimplemented or Reserved
Figure 7-62. Timer Input Capture Holding Register 2 Low (TC2H)