Datasheet

Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
MC9S12XDP512 Data Sheet, Rev. 2.21
822 Freescale Semiconductor
ECLKCTL R
NECLK NCLKX2
0000
EDIV1 EDIV0
W
Reserved R 0 0 0 0 0 0 0 0
W
IRQCR R
IRQE IRQEN
000000
W
Reserved R 0 0 0 0 0 0 0 0
W
Non-PIM
Address
Range
R
Non-PIM Address Range
W
PORTK R
PK7 PK6 PK5 PK4 PK3 PK2 PK1 PK0
W
DDRK R
DDRK7 DDRK6 DDRK5 DDRK4 DDRK3 DDRK2 DDRK1 DDRK0
W
Non-PIM
Address
Range
R
Non-PIM Address Range
W
PTT R
PTT7 PTT6 PTT5 PTT4 PTT3 PTT2 PTT1 PTT0
W
PTIT R PTIT7 PTIT6 PTIT5 PTIT4 PTIT3 PTIT2 PTIT1 PTIT0
W
DDRT R
DDRT7 DDRT6 DDRT5 DDRT4 DDRT3 DDRT2 DDRT1 DDRT0
W
RDRT R
RDRT7 RDRT6 RDRT5 RDRT4 RDRT3 RDRT2 RDRT1 RDRT0
W
PERT R
PERT7 PERT6 PERT5 PERT4 PERT3 PERT2 PERT1 PERT0
W
PPST R
PPST7 PPST6 PPST5 PPST4 PPST3 PPST2 PPST1 PPST0
W
Register
Name
Bit 7 6 5 4 3 2 1 Bit 0
= Unimplemented or Reserved
Figure 22-2. PIM Register Summary (Sheet 2 of 6)