Datasheet

Chapter 23 DQ256 Port Integration Module (S12XDQ256PIMV2)
MC9S12XDP512 Data Sheet, Rev. 2.21
936 Freescale Semiconductor
This register configures the drive strength of each port S output pin as either full or reduced. If the port is
used as input this bit is ignored.
23.0.5.27 Port S Pull Device Enable Register (PERS)
Read: Anytime.
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as input or
as output in wired-OR (open drain) mode. This bit has no effect if the port is used as push-pull output. Out
of reset a pull-up device is enabled.
23.0.5.28 Port S Polarity Select Register (PPSS)
Read: Anytime.
Write: Anytime.
This register selects whether a pull-down or a pull-up device is connected to the pin.
Table 23-28. RDRS Field Descriptions
Field Description
7–0
RDRS[7:0]
Reduced Drive Port S
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
76543210
R
PERS7 PERS6 PERS5 PERS4 PERS3 PERS2 PERS1 PERS0
W
Reset 11111111
Figure 23-29. Port S Pull Device Enable Register (PERS)
Table 23-29. PERS Field Descriptions
Field Description
7–0
PERS[7:0]
Pull Device Enable Port S
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
76543210
R
PPSS7 PPSS6 PPSS5 PPSS4 PPSS3 PPSS2 PPSS1 PPSS0
W
Reset 00000000
Figure 23-30. Port S Polarity Select Register (PPSS)