Datasheet

Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names
are the property of their respective owners. This product incorporates SuperFlash
®
technology licensed from SST.
© Freescale Semiconductor, Inc. 2005
Document Number: S12XAFAMILYFS
REV 0
Learn More: For more information about Freescale’s MCS12X Family, please visit www.freescale.com/S12X.
XGATE Coprocessor
> Peripheral coprocessor performing complex
DMA and data preprocessing features
> Easily programmable in C
> Up to 80 MHz operation
> Low level of interrupt
loading on the main CPU
> Transfers data to or from peripherals,
RAM and Flash without CPU intervention
or CPU wait states
> Able to perform operations on data
(logical, shifts, arithmetic, bit operations)
Memory
> Proven automotive Flash technology
• 10K W/E cycles at 125ºC
• Ability to execute from one Flash block
while programming/erasing another
• No external high voltage
or charge pump required
> 1 KB, 2 KB or 4 KB EEPROM
• Minimum of 100K W/E cycles
> 4 KB, 8 KB, 12 KB, 16 KB,
20 KB or 32 KB RAM
> Security enhancement: option of locking
BDM access to Flash and EEPROM
> Flash array usable for EE extension
(virtual EEPROM implementation)
5V ADC Inputs and 5V I/O
Non-Multiplexed External Bus
> 23-bit address/16-bit data wide
System Integration Modules,
Including Enhanced Interrupt Controller
> Windowed COP watchdog
and clock monitor
> Seven levels of nested interrupt
Up to Six Serial Communications
Interfaces with Hardware LIN Support
Up to Three Serial Peripheral Interfaces
Up to Two Inter-Integrated Circuit
(I
2
C) Interfaces
10-bit ADC
> One 8-channel and one 16-channel
> External/internal conversion
trigger capability
> 7 µs, 10-bit single conversion time
Real-Time Interrupt
Enhanced Capture Timer
> Excellent 1–256 prescaler
> Eight programmable 16-bit input capture
or output compare channels
> Four 8-bit or two 16-bit
pulse accumulators
> Four buffered input capture channels
> 16-bit modulus down-counter
Clock Generation Module
> Phase-Lock Loop (PLL) clock
frequency multiplier/divider
> Clock monitor
> Low-power Pierce oscillator using
a 0.5 MHz to 16 MHz crystal or
full-drive Pierce 0.5 MHz to 40 MHz
crystal oscillator reference clock
Periodic Interrupt Timer
> Four 16-bit internal counters
> Two independent 8-bit prescalers
PWM Channels
> Independent period and duty cycle
center-aligned outputs for motor control
> 8-bit, 8-channel; or 16-bit, 4-channel
Up to 119 Input/Output (I/O) Lines
> Programmable pull-ups/pull-downs
> Dual drive capability for
EMC-optimized design
Development Support/
On-Chip Debug Interface
> Single-wire background debug mode (BDM)
for debugging both S12X CPU and XGATE
simultaneously while running at full speed
> On-chip hardware breakpoints with
no limitation on memory address
> Read/write memory and registers
while running at full speed
Package Temp.
XGATE Speed CANFlash
Device
RAM E2 SCI SPI
I
2
C
Periodic
Interrupt
Timer
(24-bit)
PWM
(8-bit)
I/O
Enhanced
Capture
Timer
(16-bit)
ADC
(10-bit)
80 QFP (FU)
59 C/V*
7
1 x 8 ch. 4
–221
Yes 40 MHz32 KB 4 KB MC9S12XA512
1 x 8 ch.
112 LQFP (PV)91 C/V*
8
1 x 8 ch. 4
–431
Yes 40 MHz32 KB 4 KB MC9S12XA512
2 x 8 ch.
144 LQFP (FV)
119 C/V*
8
1 x 8 ch. 4
–631Yes 40 MHz32 KB 4 KB MC9S12XA512
1 x 8 ch.,
1 x 16 ch.
512 KB
80 QFP (FU)59 C/V*
7
1 x 8 ch. 4
–221
Yes 40 MHz16 KB 4 KB MC9S12XA256
1 x 8 ch.
112 LQFP (PV)91 C/V*
8
1 x 8 ch. 4
–431
Yes 40 MHz16 KB 4 KB MC9S12XA256
2 x 8 ch.
144 LQFP (FV)119 C/V*
8
1 x 8 ch. 4
–431
Yes 40 MHz16 KB 4 KB MC9S12XA256
1 x 8 ch.,
1 x 16 ch.
256 KB
*C -40ºC to +85ºC
V -40ºC to +105ºC
MC9S12XA512/256 PART NUMBERS
Application Notes
AN2615 HCS12 and S12X Family Compatibility
AN2685 How to Configure and Use the XGATE on S12X Devices
AN2708 An Introduction to the External Bus Interface on the HCS12X
AN2724 Using the HCS12X PIT as a 24-bit Elapsed Timer
AN2732 Using XGATE to Implement LIN Communication on HCS12X
AN2734 HCS12X Family Memory Organization
Product Documentation
Product Brief 9S12XAFAMPP
User Manual 9S12XAP512DGV2