Datasheet

Features
MC9S12XD Family, Rev. 2.16
Freescale Semiconductor 3
XGATE
Programmable, high performance I/O co-processor module — up to
80 MIPS RISC performance
Transfers data to or from all peripherals and RAM without CPU
intervention or CPU wait states
Performs logical, shifts, arithmetic, and bit operations on data
Enables FullCAN capability when used in conjunction with MSCAN
module
Full LIN master or slave capability when used in conjunction with the
six integrated LIN SCI modules
Can interrupt the HCS12X CPU signalling transfer completion
Triggers from any hardware module as well as from the CPU possible
Memory Options
64K, 128K, 256K, 384K and 512K byte Flash
128K and 256K ROM
Flash General Features
Automated program and erase algorithm
Fast sector erase and word program operation
2-stage command pipeline for faster multi-word program times
Sector erase abort feature for critical interrupt response
Protection scheme to prevent accidental program or erase
Automated program and erase algorithm
Fast sector erase and word program operation
2-stage command pipeline for faster multi-word program times
Sector erase abort feature for critical interrupt response
Protection scheme to prevent accidental program or erase
4K, 8K, 12K, 14K, 16K, 20K, 32K Byte RAM
Oscillator (OSC_LCP)
Loop control Pierce oscillator using a 0.5 MHz to 16 MHz crystal
Option for full-swing Pierce without internal feedback resistor using a
0.5 MHz to 40 MHz crystal
Current gain control on amplitude output
Signal with low harmonic distortion
Low power
Good noise immunity
Eliminates need for external current limiting resistor
Transconductance sized for optimum start-up margin for typical
crystals
Clock monitor