Datasheet

MC9S12XD Family, Rev. 2.16
4 Freescale Semiconductor
Features
Clock and Reset
Generator (CRG)
• Phase-locked-loop clock frequency multiplier
– Reference divider
– Automatic bandwidth control mode for low-jitter operation
– Automatic frequency lock detector
• Fast wakeup from STOP in self clock mode for power saving and
immediate program execution
• Computer operating properly (COP) watchdog with optional safety
window to initialize timeout counter
• Real time interrupt for task scheduling purposes or cyclic wakeup
from low power modes
• System reset generation
Non-Multiplexed
External Bus
(144 Pin package only)
• 16 bit data
• Support for external WAIT input or internal wait cycles to adapt MCU
speed to peripheral speed requirements
• Up to four chip select outputs to select 16K, 1M, 2M and 4M byte
address spaces
• Supports glue-less interface to popular asynchronous RAMs and
Flash devices
• External address space 4M byte for data and program space
Analog-to-Digital
Converter (ATD)
• Programmable sample time
• Left/right, signed/unsigned result data
• Continuous conversion mode
• Multiple channel scans
• Pins can also be used as digital I/O
Enhanced Capture
Timer (ECT)
• Eight 16-bit channels for input capture or output compare
• One 16-bit free-running counter with 8-bit precision prescaler
• One 16-bit modulus down counter with 8-bit precision prescaler
• Four 8-bit or two 16-bit pulse accumulators
• Four channels have enhanced input capture capabilities:
– Delay counter for noise immunity
– 16-bit capture buffer
– 8-bit pulse accumulator buffer
Periodic Interrupt
Timer (PIT)
• Four channel x 24-bit modulus down-count timers
– Timeout interrupt
– Timeout peripheral trigger
• Start of timers can be aligned