Datasheet

Features
MC9S12XD Family, Rev. 2.16
Freescale Semiconductor 5
Pulse Width
Modulator (PWM)
Eight channel x 8-bit or four channel x 16-bit pulse width modulator
Programmable period and duty cycle per channel
Center-aligned or left-aligned outputs
Programmable clock select logic with a wide range of frequencies
Multi-scalable
Controller
Area Networks
(MSCAN)
Up to five MSCAN modules (see )
CAN 2.0 A, B software compatible
Standard and extended data frames
0–8 bytes data length
Programmable bit rate up to 1 Mbps
Five receive buffers with FIFO storage scheme
Three transmit buffers with internal prioritization
Flexible identifier acceptance filter programmable as:
2 x 32-bit
4 x 16-bit
8 x 8-bit
Wakeup with integrated low-pass filter option
Loop back for self test
Listen-only mode to monitor CAN bus
Bus-off recovery by software intervention or automatically
16-bit time stamp of transmitted/received messages
FullCAN capability when used in conjunction with XGATE
Serial Peripheral
Interface (SPI)
Up to three SPI modules (see )
Full-duplex or single-wire bidirectional
Double-buffered transmit and receive
Master or slave mode
MSB-first or LSB-first shifting
Serial clock phase and polarity options
Serial Communication
Interfaces (SCI)
Up to six SCI modules (see )
Full-duplex or single wire operation
Standard mark/space non-return-to-zero (NRZ) format
Selectable IrDA 1.4 return-to-zero-inverted (RZI) format with
programmable pulse widths
13-bit baud rate selection
Programmable character length
Programmable polarity for transmitter and receiver
Receive wakeup on active edge
Break detect and transmit collision detect supporting LIN