Datasheet

Chapter 18 Memory Mapping Control (S12XMMCV3)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor 665
Figure 18-12. RPAGE Address Mapping
NOTE
Because RAM page 0 has the same global address as the register space, it is
possible to write to registers through the RAM space when RPAGE = 0x00.
The reset value of 0xFD ensures that there is a linear RAM space available between addresses 0x1000 and
0x3FFF out of reset.
The fixed 4K page from 0x2000–0x2FFF of RAM is equivalent to page 254 (page number 0xFE).
The fixed 4K page from 0x3000–0x3FFF of RAM is equivalent to page 255 (page number 0xFF).
Table 18-12. RPAGE Field Descriptions
Field Description
7–0
RP[7:0]
RAM Page Index Bits 7–0 — These page index bits are used to select which of the 256 RAM array pages is to
be accessed in the RAM Page Window.
Bit18
Bit0
Bit11
0
Address [11:0]
RPAGE Register [7:0]
Global Address [22:0]
Bit12
Bit19
0
Address: CPU Local Address
or BDM Local Address
0