Datasheet

Chapter 18 Memory Mapping Control (S12XMMCV3)
MC9S12XDP512 Data Sheet, Rev. 2.21
670 Freescale Semiconductor
18.3.2.12 RAM Shared Region Upper Boundary Register (RAMSHU)
Read: Anytime
Write: Anytime when RWPE = 0
Address: 0x011F
76543210
R1
SHU6 SHU5 SHU4 SHU3 SHU2 SHU1 SHU0
W
Reset 11111111
= Unimplemented or Reserved
Figure 18-20. RAM Shared Region Upper Boundary Register (RAMSHU)
Table 18-18. RAMSHU Field Descriptions
Field Description
6–0
SHU[6:0]
RAM Shared Region Upper Boundary Bits 6–0 — These bits define the upper boundary of the shared
memory in multiples of 256 bytes. The block selected by this register is included in the region. See Figure 18-25
for details.