Datasheet

Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor 825
PERH R
PERH7 PERH6 PERH5 PERH4 PERH3 PERH2 PERH1 PERH0
W
PPSH R
PPSH7 PPSH6 PPSH5 PPSH4 PPSH3 PPSH2 PPSH1 PPSH0
W
PIEH R
PIEH7 PIEH6 PIEH5 PIEH4 PIEH3 PIEH2 PIEH1 PIEH0
W
PIFH R
PIFH7 PIFH6 PIFH5 PIFH4 PIFH3 PIFH2 PIFH1 PIFH0
W
PTJ R
PTJ7 PTJ6 PTJ5 PTJ4
0
PTJ2 PTJ1 PTJ0
W
PTIJ R PTIJ7 PTIJ6 PTIJ5 PTIJ4 0 PTIJ2 PTIJ1 PTIJ0
W
DDRJ R
DDRJ7 DDRJ6 DDRJ5 DDRJ4
0
DDRJ2 DDRJ1 DDRJ0
W
RDRJ R
RDRJ7 RDRJ6 RDRJ5 RDRJ4
0
RDRJ2 RDRJ1 RDRJ0
W
PERJ R
PERJ7 PERJ6 PERJ5 PERJ4
0
PERJ2 PERJ1 PERJ0
W
PPSJ R
PPSJ7 PPSJ6 PPSJ5 PPSJ4
0
PPSJ2 PPSJ1 PPSJ0
W
PIEJ R
PIEJ7 PIEJ6 PIEJ5 PIEJ4
0
PIEJ2 PIEJ1 PIEJ0
W
PIFJ R
PPSJ7 PPSJ6 PPSJ5 PPSJ4
0
PPSJ2 PPSJ1 PPSJ0
W
Reserved R 0 0 0 0 0 0 0 0
W
PT1AD0 R
PT1AD07 PT1AD06 PT1AD05 PT1AD04 PT1AD03 PT1AD02 PT1AD01 PT1AD00
W
Reserved R 0 0 0 0 0 0 0 0
W
Register
Name
Bit 7 6 5 4 3 2 1 Bit 0
= Unimplemented or Reserved
Figure 22-2. PIM Register Summary (Sheet 5 of 6)