Datasheet

If the associated SCI transmit or receive channel is enabled this register has no effect on the pins.
The pin is forced to be an output if a SCI transmit channel is enabled, it is forced to be an input if
the SCI receive channel is enabled.
The DDRS bits revert to controlling the I/O direction of a pin when the associated channel is
disabled.
24.0.5.22 Port S Reduced Drive Register (RDRS)
Read: Anytime.
Write: Anytime.
This register configures the drive strength of each port S output pin as either full or reduced. If the
port is used as input this bit is ignored.
24.0.5.23 Port S Pull Device Enable Register (PERS)
Read: Anytime.
Table 24-23. DDRS Field Descriptions
Field Description
7–0
DDRS[7:0]
Data Direction Port S
0 Associated pin is configured as input.
1 Associated pin is configured as output.
Note: Due to internal synchronization circuits, it can take up to 2 bus clock cycles until the correct value is read
on PTS or PTIS registers, when changing the DDRS register.
76543210
R
RDRS7 RDRS6 RDRS5 RDRS4 RDRS3 RDRS2 RDRS1 RDRS0
W
Reset 00000000
Figure 24-24. Port S Reduced Drive Register (RDRS)
Table 24-24. RDRS Field Descriptions
Field Description
7–0
RDRS[7:0]
Reduced Drive Port S
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
76543210
R
PERS7 PERS6 PERS5 PERS4 PERS3 PERS2 PERS1 PERS0
W
Reset 11111111
Figure 24-25. Port S Pull Device Enable Register (PERS)