Datasheet

Chapter 5 Analog-to-Digital Converter (S12ATD10B8CV2)
MC9S12XDP512 Data Sheet, Rev. 2.21
176 Freescale Semiconductor
5.3.2.8 Reserved Register (ATDTEST0)
Read: Anytime, returns unpredictable values
Write: Anytime in special modes, unimplemented in normal modes
NOTE
Writing to this register when in special modes can alter functionality.
5.3.2.9 ATD Test Register 1 (ATDTEST1)
This register contains the SC bit used to enable special channel conversions.
Read: Anytime, returns unpredictable values for Bit7 and Bit6
Write: Anytime
76543210
RUUUUUUUU
W
Reset 10000000
= Unimplemented or Reserved
Figure 5-10. Reserved Register (ATDTEST0)
76543210
RUU00000
SC
W
Reset 00000000
= Unimplemented or Reserved
Figure 5-11. ATD Test Register 1 (ATDTEST1)
Table 5-18. ATDTEST1 Field Descriptions
Field Description
0
SC
Special Channel Conversion Bit — If this bit is set, then special channel conversion can be selected using CC,
CB and CA of ATDCTL5. Table 5-19 lists the coding.
0 Special channel conversions disabled
1 Special channel conversions enabled
Note: Always write remaining bits of ATDTEST1 (Bit7 to Bit1) zero when writing SC bit. Not doing so might result
in unpredictable ATD behavior.
Table 5-19. Special Channel Select Coding
SC CC CB CA Analog Input Channel
1 0 X X Reserved
11 0 0 V
RH
11 0 1 V
RL
11 1 0 (V
RH
+V
RL
) / 2
1 1 1 1 Reserved