Datasheet

Chapter 6 XGATE (S12XGATEV2)
MC9S12XDP512 Data Sheet, Rev. 2.21
200 Freescale Semiconductor
6.3.1.12 XGATE Register 4 (XGR4)
The XGR4 register (Figure 6-15) provides access to the RISC core’s register 4.
Read: In debug mode if unsecured
Write: In debug mode if unsecured
6.3.1.13 XGATE Register 5 (XGR5)
The XGR5 register (Figure 6-16) provides access to the RISC core’s register 5.
Read: In debug mode if unsecured
Write: In debug mode if unsecured
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
XGR4
W
Reset 0 0 0 0000000000000
Figure 6-15. XGATE Register 4 (XGR4)
Table 6-12. XGR4 Field Descriptions
Field Description
15–0
XGR4[15:0]
XGATE Register 4 — The RISC core’s register 4
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
XGR5
W
Reset 0 0 0 0000000000000
Figure 6-16. XGATE Register 5 (XGR5)
Table 6-13. XGR5 Field Descriptions
Field Description
15–0
XGR5[15:0]
XGATE Register 5 — The RISC core’s register 5