Datasheet

Chapter 11 Serial Communication Interface (S12SCIV5)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor 487
11.3.2.5 SCI Alternative Control Register 2 (SCIACR2)
Read: Anytime, if AMAP = 1
Write: Anytime, if AMAP = 1
76543210
R00000
BERRM1 BERRM0 BKDFE
W
Reset 00000000
= Unimplemented or Reserved
Figure 11-8. SCI Alternative Control Register 2 (SCIACR2)
Table 11-7. SCIACR2 Field Descriptions
Field Description
2:1
BERRM[1:0]
Bit Error Mode — Those two bits determines the functionality of the bit error detect feature. See Table 11-8.
0
BKDFE
Break Detect Feature Enable — BKDFE enables the break detect circuitry.
0 Break detect circuit disabled
1 Break detect circuit enabled
Table 11-8. Bit Error Mode Coding
BERRM1 BERRM0 Function
0 0 Bit error detect circuit is disabled
0 1 Receive input sampling occurs during the 9th time tick of a transmitted bit
(refer to Figure 11-19)
1 0 Receive input sampling occurs during the 13th time tick of a transmitted bit
(refer to Figure 11-19)
1 1 Reserved