Datasheet

Chapter 13 Periodic Interrupt Timer (S12PIT24B4CV1)

MC9S12XDP512 Data Sheet, Rev. 2.21

550 Freescale Semiconductor

13.3.0.9 PIT Count Register 0 to 3 (PITCNT0–3)

Read: Anytime

Write: Has no meaning or effect

15 14 13 12 11 109876543210

PCNT

Reset 0000000000000000

Figure 13-15. PIT Count Register 0 (PITCNT0)

15 14 13 12 11 109876543210

PCNT

Reset 0000000000000000

Figure 13-16. PIT Count Register 1 (PITCNT1)

15 14 13 12 11 109876543210

PCNT

Reset 0000000000000000

Figure 13-17. PIT Count Register 2 (PITCNT2)

15 14 13 12 11 109876543210

PCNT

Reset 0000000000000000

Figure 13-18. PIT Count Register 3 (PITCNT3)

Table 13-9. PITCNT0–3 Field Descriptions

Field Description

15:0

PCNT[15:0]

PIT Count Bits 15-0 — These bits represent the current 16-bit modulus down-counter value. The read access

for the count register must take place in one clock cycle as a 16-bit access.