Datasheet
Chapter 20 S12X Debug (S12XDBGV3) Module
MC9S12XDP512 Data Sheet, Rev. 2.21
778 Freescale Semiconductor
20.4.5.3 Trace Buffer Organization
The buffer can be used to trace either from S12XCPU, from XGATE or from both sources. An X prefix
denotes information from the XGATE module, a C prefix denotes information from the S12XCPU.
ADRH, ADRM, ADRL denote address high, middle and low byte respectively. INF bytes contain control
information (R/W, S/D etc.). The numerical suffix indicates which tracing step. The information format
for Loop1 Mode is the same as that of Normal Mode. Whilst tracing from XGATE or S12XCPU only, in
Normal or Loop1 modes each array line contains data from entries made at two separate times, thus in this
case the DBGCNT[0] is incremented after each separate entry. In all other modes DBGCNT[0] remains
cleared whilst the other DBGCNT bits are incremented on each trace buffer entry.
XGATE and S12XCPU COFs occur independently of each other and the profile of COFs for the two
sources is totally different. When both sources are being traced in Normal or Loop1 mode, for each COF
from one source, there may be many COFs from the other source, depending on user code. COF events
could occur far from each other in the time domain, on consecutive cycles or simultaneously. When a COF
occurs in either source (S12X or XGATE) a trace buffer entry is made and the corresponding CDV or XDV
bit is set. The current PC of the other source is simultaneously stored to the trace buffer even if no COF
has occurred, in which case CDV/XDV remains cleared indicating the address is not associated with a
COF, but is simply a snapshot of the PC contents at the time of the COF from the other source.
Single byte data accesses in Detail Mode are always stored to the low byte of the trace buffer (CDATAL
or XDATAL) and the high byte is cleared. When tracing word accesses, the byte at the lower address is
always stored to trace buffer byte3 and the byte at the higher address is stored to byte2
Table 20-39. Trace Buffer Organization
Mode
8-Byte Wide Word Buffer
76543210
XGATE
Detail
CXINF1 CADRH1 CADRM1 CADRL1 XDATAH1 XDATAL1 XADRM1 XADRL1
CXINF2 CADRH2 CADRM2 CADRL2 XDATAH2 XDATAL2 XADRM2 XADRL2
S12XCPU
Detail
CXINF1 CADRH1 CADRM1 CADRL1 CDATAH1 CDATAL1 XADRM1 XADRL1
CXINF2 CADRH2 CADRM2 CADRL2 CDATAH2 CDATAL2 XADRM2 XADRL2
Both
Other Modes
XINF0
XPCM0 XPCL0 CINF0 CPCH0 CPCM0 CPCL0
XINF1
XPCM1 XPCL1 CINF1 CPCH1 CPCM1 CPCL1
XGATE
Other Modes
XINF1
XPCM1 XPCL1 XINF0 XPCM0 XPCL0
XINF3
XPCM3 XPCL3 XINF2 XPCM2 XPCL2
S12XCPU
Other Modes
CINF1 CPCH1 CPCM1 CPCL1 CINF0 CPCH0 CPCM0 CPCL0
CINF3 CPCH3 CPCM3 CPCL3 CINF2 CPCH2 CPCM2 CPCL2
