Datasheet

Chapter 18 Memory Mapping Control (S12XMMCV3)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor 661
18.3.2.3 Global Page Index Register (GPAGE)
Read: Anytime
Write: Anytime
The global page index register is used to construct a 23 bit address in the global map format. It is only used
when the CPU is executing a global instruction (GLDAA, GLDAB, GLDD, GLDS, GLDX,
GLDY,GSTAA, GSTAB, GSTD, GSTS, GSTX, GSTY) (see CPU Block Guide). The generated global
address is the result of concatenation of the CPU local address [15:0] with the GPAGE register [22:16] (see
Figure 18-7).
CAUTION
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Figure 18-7. GPAGE Address Mapping
Example 18-1. This example demonstrates usage of the GPAGE register
LDX #0x5000 ;Set GPAGE offset to the value of 0x5000
MOVB #0x14, GPAGE ;Initialize GPAGE register with the value of 0x14
GLDAA X ;Load Accu A from the global address 0x14_5000
Address: 0x0010
76543210
R0
GP6 GP5 GP4 GP3 GP2 GP1 GP0
W
Reset 00000000
= Unimplemented or Reserved
Figure 18-6. Global Page Index Register (GPAGE)
Table 18-8. GPAGE Field Descriptions
Field Description
6–0
GP[6:0]
Global Page Index Bits 6–0 — These page index bits are used to select which of the 128 64-kilobyte pages is
to be accessed.
Bit16 Bit 0Bit15Bit22
CPU Address [15:0]GPAGE Register [6:0]
Global Address [22:0]